The present invention relates to methods for fabricating semiconductor devices; and, more particularly, to methods for forming fine metal patterns by using damascene technique, which can form the fine patterns such as word line, bit line or the like by forming insulating film patterns and depositing the conductive film material within the hole formed between the insulating film patterns without etching the conductive film or followed by etching only the conductive film within the hole.
There will be described a method for forming fine metal patterns using damascene technique in accordance with a prior art, referring to FIGS. 1a to 1g. 
First, as shown in FIG. 1a, a first insulating film 11 is formed on a semiconductor substrate 10 and selectively etched to open the regions within which metal patterns will be formed later. A second insulating film is then deposited and wholly etched to form insulating film spacers 12 on the sidewell of the first insulating film pattern 11, as shown in FIG. 1b. 
Next, referring to FIG. 1c, a glue layer 13 and a diffusion barrier film 14 are, in turn, deposited over the entire structure. A metal film 15 is then formed on the diffusion barrier film 14 as shown in FIG. 1d. The glue layer 13 is for enhancing adhesive force between the metal film and lower layer (semiconductor substrate), and the diffusion barrier film 14 is for preventing the metal film from mutually reacting with the glue film 13.
Then, referring to FIG. 1e, the metal film 15, the diffusion barrier film 14 and the glue layer 13 are simultaneously etched to form metal patterns, which are insulated with the insulating film patterns 11 and the insulating film spacers 12. As shown in FIGS. 1f and 1g, an etching stop layer 16 is deposited and flattened by chemical mechanical polishing or etching until the insulating film patterns 11 are exposed, thereby being left only on the metal pattern. The etching stop layer 16 will protect the metal pattern in the subsequent process for etching the first insulating film 11 pattern to form self align contact.
As described above, since the metal film 15 of the fine metal pattern is simultaneously etched with the diffusion barrier film 14 and the glue layer 13, it is difficult to control the process in the method according to the prior art. Furthermore, in the structure of fine pattern according to the prior art, the diffusion barrier film 14 and the glue layer 13 enclose the conductive film 15 at its both sidewells and bottom. Therefore, the width of the metal film 15 is smaller than that of the predetermined and it is difficult to obtain fast operation speed from the device in accordance with the prior art.
In case of applying the prior art to fabrication of high integrated device having a line width of 0.13 xcexcm or less, there are some difficulties in the process development that the thicknesses of the second insulating film 12, the diffusion barrier film 14 and the glue layer 13 must be decreased.
It is, therefore, an object of the present invention to provide a method for forming fine metal patterns of semiconductor devices using damascene technique, which can enhance the operation speed of the devices by increasing the width of the metal film of the fine pattern.
It is another object of the present invention to provide a method for forming fine metal patterns of semiconductor devices using damascene technique, which can easily control the processes for forming the fine pattern by depositing only the metal film material of the fine pattern within the contact hole or via hole which is formed by etching the insulating film on a lower layer. In comparison that the metal film is deposited with a diffusion barrier film and glue layer within the hole in the prior art and simultaneously etched with the other films, in the method according to the present invention, only the metal film is deposited within the hole, and the diffusion barrier film and glue layer are deposited on the lower layer, not within the hole. Therefore, only the metal film can be etched within the hole, separating the etching of the other films.
In accordance with an aspect of the present invention, there is provided a method for forming fine metal patterns of semiconductor devices using damascene technique, which comprises the steps of: forming a glue layer and a diffusion barrier film on a lower layer, in turn; forming on the diffusion barrier film, insulating film patterns which define regions of fine patterns therebetween; forming a metal film within the fine pattern region; forming an etching stop film on the metal film within the fine pattern region; removing the insulating film to expose the diffusion barrier film; and selectively etching the diffusion barrier film and the glue layer using the etching stop film as an etching mask.
In accordance with another aspect of the present invention, there is provided a method for forming fine metal patterns of semiconductor devices using damascene technique, which comprises the steps of: forming a glue layer and a diffusion barrier film on a lower layer, in turn; forming on the diffusion barrier film, a first insulating film and selectively etching it to form the first insulating film patterns which define regions of fine patterns therebetween; forming a second insulating film over the entire structure and wholly etching it to form insulating film spacers on the sidewells of the first insulating film pattern; forming a metal film within the fine pattern region; forming an etching stop film on the metal film within the fine pattern region; removing the insulating film pattern to expose the diffusion barrier film; and selectively etching the diffusion barrier film and the glue layer using the etching stop film as an etching mask.